GR740 user day 2022
Thursday 15th of December 2022
The GR740 User Day U.S. Webinar is an online event where invited speakers from several companies will present applications and experiences with the GR740 microprocessor.
SPEAKERS AND PRESENTATIONS
Download all presentations from the 13th and 15th of December 2022 in PDF format:
Bill Stewart – MDA Experience of LEON Processors
Digital Hardware Engineer, MDA
Bill Stewart, MDA, Canada is the lead of two electronic units of the Chorus next generation Synthetic Aperture RADAR satellite.
David Foor – Integrated Avionics for Small Spacecraft Missions
Researcher and Designer, Jet Propulsion Laboratory
David Foor is a Researcher and Designer at NASA’s Jet Propulsion Lab (JPL). David received is BSEE from Texas A&M and his MSEE at Caltech.
Elaine Gonsalves – Announcements
Product Marketing Manager, CAES Gaisler Products
Elaine Gonsalves is the Product Marketing Manager at CAES Gaisler Products, being responsible for the company’s US customer base. She held various positions within the company in the past including Field Applications Engineer, Business Development Manager and Standard Product Marketing Manager. Elaine holds BS/MS degrees in Electrical Engineering from Worcester Polytechnic Institute in Massachusetts.
Fabio Malatesta – GR765 Development Status
Hardware Engineer, CAES Gaisler Products
Fabio Malatesta works as Product Marketing Engineer for Gaisler Products. He has worked in hardware IP design and verification since the early stages of his career, focusing on complex SoC architectures for FPGAs and ASICs. Fabio holds degrees in Electronics Engineering and Telecommunications from the University of Rome.
Jan Andersson – GR740 Development Status
Director of Engineering, CAES Gaisler Products
Jan serves as the Director of Engineering at Gaisler in Gothenburg, Sweden. Jan joined Gaisler in 2006. He has worked with the LEON4 SPARC processor design and the Next Generation Microprocessor (NGMP, GR740) development with ESA. He has a Master of Science Degree in Embedded Systems from the Chalmers University of Technology in Gothenburg.
Joel Nelsen – Space Dynamics Laboratory current and future use of the GR740 for Instrument Control and Avionics C&DH in Space
Senior Electrical Engineer/Computer Engineer, Space Dynamics Laboratory
Joel Nelsen is a Senior Electrical Engineer/Computer Engineer at Space Dynamics Laboratory’s (SDL) Small Satellite Avionics Group. Joel received his BS/MSEE in Space Systems from Utah State University.
Paul Graham – Hybrid OpenVPX/SpaceVPX Payload Processors using the GR740
Project Leader, Los Alamos National Laboratory
Paul Graham received Ph.D. in Electrical Engineering from Brigham Young University in 2001 after receiving a B.S and M.S in Electrical Engineering from the same institution. Dr. Graham serves as the project leader for the Advanced Processing and Communications team in the Intelligence and Space Research Division at Los Alamos National Laboratory, where he has contributed to the design, development, testing, and operations of both experimental and operational satellite payloads for the Department of Energy. Dr. Graham has more than forty publications relating to reliability, FPGAs, computing, and related topics and more than 25 years of experience with FPGA and embedded systems, architectures, applications, and design tools.
Robert Hillman – SCS3740 Rad Hard SBC and Next Gen SBC using the GR740
Director of Engineering, Data Device Corporation (DDC)
Robert Hillman is Director of Engineering for DDC Space in Poway, CA. He has Bachelors of engineering degrees in both Electrical Engineering and Computer Engineering, and a Masters Degree in Electrical engineering. He has worked at DDC helping to design components and SBC’s for the space market for over 22 years.
Sandi Habinc – Welcome & Moderator
General Manager, CAES Gaisler Products
Serves as the General Manager of Gaisler in Gothenburg, that provides the full ecosystem to support digital hardware design for mission critical System-on-a-Chip solutions. Throughout his 20-year tenure at Gaisler, Sandi has played a vital role in establishing and promoting industry-leading embedded computer systems for commercial and aerospace applications. Sandi was a microelectronics engineer for the European Space Agency in Noordwijk, The Netherlands, where he was the design manager for various digital and mixed-signal Application Specific ICs (ASIC) projects. He has earned a Master of Science Degree in Computer Science and Engineering from the Chalmers University of Technology.
All times in EST
CAES Gaisler Products
GR740 Development Status
The development of the rad-hard GR740 quad-core LEON4FT microprocessor has now been completed and the product with the ceramic package has achieved QML-V qualification earlier this year. In parallel the development of the organic package is progressing and the evaluation and lot validation is being completed. The presentation will cover the functionality of the GR740 and development status of both package variants.
CAES Gaisler Products
SCS3740 Rad Hard SBC and Next Gen SBC using the GR740
DDC has been designing components and single board computers (SBC) for the space market for over 25 years. Our SCS3740 Rad Hard SBC has been optimized for radiation tolerance, low power in a 3U SpaceVPX form factor. DDC will be presenting the present SCS3740 board, as well as the new SCS3740G2 (2nd Generation) board with memory upgrades in density and performance, along with a description of some of the components used with the GR740.
Data Device Corporation
Hybrid OpenVPX/SpaceVPX Payload Processors using the GR740
Los Alamos National Laboratory has developed and built both 6U and 3U payload processor modules based on the CAES Gaisler GR740 microprocessor that implement a hybridization of OpenVPX and SpaceVPX to aid with interoperability and provide support for higher performance protocols in the future. A key to this flexibility is the use of a Microchip RTG4 FPGA that augments the capabilities of the GR740 and allows for application-specific hardware customizations through changes in FPGA firmware. We will discuss the architectures and features of the boards and our lessons learned regarding our use of the GR740 in these designs.
Los Alamos National Labs
Integrated Avionics for Small Spacecraft Missions
Sabertooth is an integrated high-reliability deep space avionics platform, which s JPL’s follow on to Sphinx deep-space cubesat command & data handling (C&DH) single board computer (SBC). JPL will give an overview of Sabertooth and explain how the GR740 was utilized in both the compute and telecom layers.
Jet Propulsion Laboratory
MDA Experience of LEON Processors
MDA will share details of usage of the GR740 based processor unit for the Chorus mission, as well as a wish list for new features and improvements in the GR765.
Space Dynamics Laboratory current and future use of the GR740 for Instrument Control and Avionics C&DH in Space
Building on prior LEON designs including, various instrument control applications, as well as Avionics C&DH for highly reliable small spacecraft and subsystems; SDL has extended the use of the new GR740 to instrument control and processing, and in the future to Avionics C&DH processing as well.
Space Dynamics Laboratory
GR765 Development Status
Based on feedback from current GR740 users, Cobham Gaisler develops the successor, under the product name “GR765”. The GR765 architecture includes several improvements over the GR740. The LEON4FT has been replaced with the LEON5FT high-performance processor, increasing computational performance while at the same time providing a low-threshold upgrade path for current GR740 users that require more computational performance or that would benefit from the added on-chip functionality of the new architecture.
The driver for the GR765 was to provide a next step for current LEON-SPARC GR740 users. At the same time, the RISC-V instruction set architecture has generated significant interest within essentially all industries, including space. To rapidly introduce RISC-V in the space domain, going beyond use of COTS or FPGA implementations, the GR765 architecture was extended with an additional mode where the eight active processor cores can either be NOEL-V RISC-V RV64GCHB processors or LEON5FT SPARC V8e processors.
The GR765 will be implemented on STMicroelectronics 28nm FDSOI technology using libraries developed by STM for use in space applications. Improvements in processor microarchitecture, bandwidth of the system-on-chip design, and operating frequency are expected to improve the computational capacity 10x – 16x compared to the GR740. In addition, the GR765 will provide significant reductions in power consumption compared to earlier generation SoCs.
Beyond this boost on processing performance, the memory bandwidth will also be significantly increased by the use of DDR2/3 SDRAM, the peripherals will be complemented by SerDes supporting among others the SpaceFibre standard, TTEthernet, TSN and several other enhancements.
CAES Gaisler Products
Announcements of new products based on, and development tools for, the GR740 processor, as well as completely new products being released before the end of the year.
CAES Gaisler Products